ISL25700
14
FN6885.0
September 3, 2010
FIGURE 13. VALID DATA CHANGES, START, AND STOP CONDITIONS
FIGURE 14. ACKNOWLEDGE RESPONSE FROM RECEIVER
FIGURE 15. BYTE WRITE SEQUENCE
FIGURE 16. READ SEQUENCE
SDA
SCL
START
DATA
DATA
STOP
STABLE CHANGE
DATA
STABLE
SDA OUTPUT FROM
TRANSMITTER
SDA OUTPUT
FROM RECEIVER
8
1
9
START
ACK
SCL FROM
MASTER
HIGH IMPEDANCE
HIGH IMPEDANCE
S
T
A
R
T
S
T
O
P
IDENTIFICATION
BYTE
ADDRESS
BYTE
DATA
BYTE
A
C
K
SIGNALS
FROM THE
MASTER
SIGNALS
FROM THE
ISL25700
A
C
K
0
0
0
1 1
A
C
K
WRITE
SIGNAL AT
SDA
0 0 0 0
0
0
0
0
SIGNALS
FROM THE
MASTER
SIGNALS
FROM THE
SLAVE
SIGNAL AT
SDA
S
T
A
R
T
IDENTIFICATION
BYTE WITH
R/
W = 0
ADDRESS
BYTE
A
C
K
A
C
K
0
0
0
1 1
S
T
O
P
A
C
K
0
1
0
1 1
IDENTIFICATIO
N BYTE WITH
R/
W = 1
A
C
K
S
T
A
R
T
LAST READ
DATA BYTE
FIRST READ
DATA BYTE
A
C
K
0 0 0
0
0 0 0
0 0 0
READ
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